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Celestin Apprentice 5
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mic_control.cpp
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1996-05-15
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/*
"mic_control.cpp"
This file contains Mic-1 objects which fall in the "control" catagory, such as
the Microinstruction Register and Control Store
*/
#include <iostream.h>
#include <fstream.h>
#include <iomanip.h>
#include "mic_main.h"
#include "mic_control.h"
#include "mic_global_functions.h"
const unsigned short kMaxControlStore = 256;
#pragma mark ••• MMUX •••
void MMUXClass::output(Mic_1_Class& Mic)
{
if (Jump)
Mic.MPC.input_MMUX(Address_word);
else // don't jump, just go ahead with the next instruction
Mic.MPC.input_MMUX(Incrementer_word);
}
ostream& operator << (ostream& s, MMUXClass& m)
{
s << hex << uppercase;
s << "MMUX:" << endl;
s << " Jump: " << m.Jump << endl;
s << " Incrementer_word: " << setw(4) << setfill('0') << right << m.Incrementer_word << endl;
s << " Address_word: " << setw(4) << setfill('0') << right << m.Address_word << endl;
s << resetiosflags(ios::hex | ios::uppercase);
return s;
}
#pragma mark ---------------------------------
#pragma mark ••• MPC •••
void MPCClass::output (Mic_1_Class& Mic)
{
Mic.ControlStore.input_MPC(Mic, word);
Mic.Incrementer.input_MPC(Mic, word);
}
ostream& operator << (ostream& s, MPCClass& m)
{
s << hex << uppercase;
s << "MPC: " << setw(4) << setfill('0') << right << m.word << endl;
s << resetiosflags(ios::hex | ios::uppercase);
return s;
}
#pragma mark ---------------------------------
#pragma mark ••• INCREMENTER •••
void IncrementerClass::output(Mic_1_Class& Mic)
{
Mic.MMUX.input_Incrementer(Mic, word + 1);
}
#pragma mark ---------------------------------
#pragma mark ••• CONTROL STORE •••
short InitMicControl (Mic_1_Class& Mic)
{
Str32 fileNameStr;
char *fileNameP;
GetIndString(fileNameStr, 129, 2);
fileNameP = P2CStr(fileNameStr);
ifstream ControlInitFile(fileNameP);
for (int n=0; n<kMaxRAM; n++)
Mic.ControlStore.putNthWord (n,0);
if (ControlInitFile.is_open())
{
ControlInitFile >> Mic.ControlStore;
// initialize the MIR to the first Microprogram instruction
Mic.ControlStore.output(Mic);
Mic.Incrementer.output(Mic);
}
else
{
return 132; // error alert code saying you're in bad shape
}
return 0;
}
unsigned long ControlStoreClass::getNthWord (short n)
{
if ((n>=0) && (n<kMaxControlStore))
{
return store[n];
}
else
return 0;
}
Boolean ControlStoreClass::putNthWord (short n, unsigned long newWord)
{
if ((n>=0) && (n<kMaxControlStore))
{
store[n] = newWord;
return true;
}
else
return false;
}
void ControlStoreClass::output (Mic_1_Class& Mic)
{
Mic.MIR.input_ControlStore(getNthWord(Index));
}
ostream& operator << (ostream& s, ControlStoreClass& c)
{
short numRows = 80;
s << "CONTROL STORE:" << endl;
for (int i=0; i<numRows; i++)
{
s << setw(3) << i << " ";
s << hex << uppercase;
s << setw(8) << setfill('0') << c.getNthWord(i);
s << resetiosflags(ios::hex | ios::uppercase);
s << endl;
}
if (numRows < kMaxControlStore)
s << endl << "<abbreviated>" << endl;
return s;
}
istream& operator >> (istream& s, ControlStoreClass& c)
{
unsigned long word = 1;
short counter = 0;
while ((counter < kMaxControlStore) && word)
{
s >> word;
s >> hex >> uppercase >> word;
s >> resetiosflags(ios::hex | ios:: uppercase);
c.putNthWord(counter++, word);
}
for (int i=counter; i<kMaxControlStore; i++)
c.putNthWord(i,0);
return s;
}
#pragma mark ---------------------------------
#pragma mark ••• MIR •••
/*
The MicroInstruction Register
______________________________________________
|A|C |A |S |M|M|R|W|E| | | | |
|M|O |L |H |B|A|D|R|N| C | B | A | ADDR |
|U|N |U | |R|R| | |C| | | | |
|X|D | | | | | | | | | | | |
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
AMUX - controls left ALU input: (0 = A latch, 1 = MBR)
COND - controls microprogram jump (0 = no jump, 1 = jump if negative,
2 = jump if zero, 3 = jump unconditionally)
ALU - ALU function: (0 = A + B, 1 = A AND B, 2 = A, 3 = ~A)
SH - shifter function: (0 = no shift, 1 = shift left, 2 = shift right)
MBR - loads mbr from shifter: (0 = don't load mbr, 1 = load mbr)
MAR - loads mar from b latch: (0 = don't load mar, 1 = load mar)
RD - requests memory read: (0 = no read, 1 = load mbr from memory)
WR - requests memory write: (0 = no write, 1 = write mbr to memory)
ENC - controls storing into scratchpad (0 = don't store, 1 = store)
C - selects register for storing into if ENC = 1 (16 options)
B - selects B bus source (16 options)
A - selects A bus source (16 options)
*/
void MIRClass::output(Mic_1_Class& Mic)
{
Mic.AMUX.input_MIR ((unsigned short)((MIR & 0x80000000) >> 31));
Mic.MicroSeq.input_MIR ((unsigned short)((MIR & 0x60000000) >> 29));
Mic.ALU.input_MIR ((unsigned short)((MIR & 0x18000000) >> 27));
Mic.Shifter.input_MIR ((unsigned short)((MIR & 0x06000000) >> 25));
Mic.MBR.input_MIR_enable ((unsigned short)((MIR & 0x01000000) >> 24));
Mic.MAR.input_MIR ((unsigned short)((MIR & 0x00800000) >> 23));
Mic.MBR.input_MIR_read ((unsigned short)((MIR & 0x00400000) >> 22));
Mic.MBR.input_MIR_write ((unsigned short)((MIR & 0x00200000) >> 21));
Mic.ScratchPad.input_MIR_enable ((unsigned short)((MIR & 0x00100000) >> 20));
Mic.ScratchPad.input_MIR_C ((unsigned short)((MIR & 0x000F0000) >> 16));
Mic.ScratchPad.input_MIR_B (Mic,(unsigned short)((MIR & 0x0000F000) >> 12));
Mic.ScratchPad.input_MIR_A (Mic,(unsigned short)((MIR & 0x00000F00) >> 8));
Mic.MMUX.input_MIR (Mic,(unsigned short)((MIR & 0x000000FF) >> 0));
}
ostream& operator << (ostream& s, MIRClass& m)
{
s << hex << uppercase;
s << "MIR: " << setw(8) << setfill('0') << m.MIR << endl;
s << resetiosflags(ios::hex | ios::uppercase);
return s;
}
#pragma mark ---------------------------------
#pragma mark ••• MICRO SEQUENCER •••
void MicroSeqClass::output(Mic_1_Class& Mic)
{
short jump = false;
switch(jump_cond)
{
case(0): break;
case(1): if (negative) jump = true; break;
case(2): if (zero) jump = true; break;
case(3): jump = true; break;
}
Mic.MMUX.input_MicroSeq(Mic, jump);
}
ostream& operator << (ostream& s, MicroSeqClass& m)
{
short zero;
short negative;
short jump_cond;
s << "MICRO SEQUENCER:" << endl;
s << " ZERO: " << m.zero << endl;
s << " NEG: " << m.negative << endl;
s << " JUMP COND: " << jump_cond << endl;
return s;
}